Otto Halbhuber

Preemptive ARM Cortex-M0+ operating system with virtual memory, protected syscalls, and a live UART shell for runtime control.

• Built a preemptive embedded OS using PIT interrupts, SVC traps, and exception-based context switching.
• Implemented a multi-queue scheduler with Rate Monotonic Scheduling, Round-Robin support, and CPU utilization tracking.
• Designed a virtual memory system with per-process address spaces, dynamic allocation, and mapping to non-contiguous physical memory.
• Built a UART shell for process control, memory operations, password-protected reads, and runtime system monitoring.

Developed a Python application to automatically collect, parse, and aggregate software verification results from multiple test baselines into a unified comparison dashboard.

• Designed a scalable parsing and normalization pipeline to extract requirement statuses and associated test metadata from structured log files, enabling cross-baseline analysis and automated reporting.
• Built an interactive PyQt interface featuring searchable and sortable tables, baseline filtering, color-coded status visualization, and detailed drill-down views for rapid investigation of verification failures.

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Columns contain the names of the baselines being tested and the rows contain the test scripts being run on them. A baseline's performance on a relevant test script is indicated by a red "FAIL" or green "PASS" cell. Further information on a baseline's performance for a certain test can be seen by clicking on the relevant cell.

TinyRV1 single-cycle CPU implemented with a full datapath, control logic, and SPI-based memory loading pipeline.

• Designed and implemented a TinyRV1 single-cycle CPU including the full datapath and control logic.
• Built an SPI-based memory interface to load 44-bit instruction packets from a host into on-chip memory.